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Computer Organization And Design 5th Edition Solutions

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Eetop.cn MK.Computer.Organization.and.Design.5th.Edition.Sep.2013 Answers

Course

Information Engineering and Computer Science

1.1 Personal computer (includes workstation and laptop): Personal computers
emphasize delivery of good performance to single users at low cost and usually
execute third-party soft ware.
Personal mobile device (PMD, includes tablets): PMDs are battery operated
with wireless connectivity to the Internet and typically cost hundreds of
dollars, and, like PCs, users can download soft ware (“apps”) to run on them.
Unlike PCs, they no longer have a keyboard and mouse, and are more likely
to rely on a touch-sensitive screen or even speech input.
Server: Computer used to run large problems and usually accessed via a network.
Warehouse scale computer: Th ousands of processors forming a large cluster.
Supercomputer: Computer composed of hundreds to thousands of processors
and terabytes of memory.
Embedded computer: Computer designed to run one application or one set
of related applications and integrated into a single system.
1.2
a. Performance via Pipelining
b. Dependability via Redundancy
c. Performance via Prediction
d. Make the Common Case Fast
e. Hierarchy of Memories
f. Performance via Parallelism
g. Design for Moore’s Law
h. Use Abstraction to Simplify Design
1.3 Th e program is compiled into an assembly language program, which is then
assembled into a machine language program.
1.4
a. 1280 1024 pixels 1,310,720 pixels 1,310,720 3 3,932,160
bytes/frame.
b. 3,932,160 bytes (8 bits/byte) /100E6 bits/second 0.31 seconds
1.5
a. performance of P1 (instructions/sec) 3 109/1.5 2 109
performance of P2 (instructions/sec) 2.5 109/1.0 2.5 109
performance of P3 (instructions/sec) 4 109/2.2 1.8 109
S-4 Chapter 1 Solutions
b. cycles(P1) 10 3 109 30 109 s
cycles(P2) 10 2.5 109 25 109 s
cycles(P3) 10 4 109 40 109 s
c. No. instructions(P1) 30 109/1.5 20 109
No. instructions(P2) 25 109/1 25 109
No. instructions(P3) 40 109/2.2 18.18 109
CPInew CPIold 1.2, then CPI(P1) 1.8, CPI(P2) 1.2, CPI(P3) 2.6
f No. instr. CPI/time, then
f(P1) 20 109 1.8/7 5.14 GHz
f(P2) 25 109 1.2/7 4.28 GHz
f(P1) 18.18 109 2.6/7 6.75 GHz
1.6
a. Class A: 105 instr. Class B: 2 105 instr. Class C: 5 105 instr.
Class D: 2 105 instr.
Time No. instr. CPI/clock rate
Total time P1 (105 2 105 2 5 105 3 2 105 3)/(2.5
109) 10.4 104 s
Total time P2 (105 2 2 105 2 5 105 2 2 105 2)/
(3 109) 6.66 104 s
CPI(P1) 10.4 104 2.5 109/106 2.6
CPI(P2) 6.66 104 3 109/106 2.0
b. clock cycles(P1) 105 1 2 105 2 5 105 3 2 105 3
26 105
clock cycles(P2) 105 2 2 105 2 5 105 2 2 105 2
20 105
1.7
a. CPI Texec f/No. instr.
Compiler A CPI 1.1
Compiler B CPI 1.25
b. fB/fA (No. instr.(B) CPI(B))/(No. instr.(A) CPI(A)) 1.37
c. TA/Tnew 1.67
TB/Tnew 2.27

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Computer Organization And Design 5th Edition Solutions

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